LMTF Radiation Testing

March 2022

Researchers from the CCL and Sandia National Laboratory travelled to the Little Mountain Test Facility in Ogden, Utah to use the LINAC for computer reliability testing. An SRAM chip (a commonly used component in bigger devices) was irradiated at varying intensities and durations to characterize its response. The people in the image on the left are (from left to right) Dolores Black (SNL), Jeff Black (SNL), Wesley Stirk (CCL), Roy Cuoco (SNL), Mike Wirthlin (CCL), and Jeff Goeders (CCL).

Andrew Keller's PhD Defense

December 2021

Andrew Keller successfully defended his PhD dissertation, “Partial Circuit Replication for Masking and Detecting Soft Errors in SRAM-Based FPGAs”. Andrew is now starting a full-time job at L3Harris in Salt Lake City.


September 2021

Students, faculty, and their spouses, got together for a party to celebrate the end of a successful summer of research. Lots of fun was had chatting and getting to know each other with plenty of cheeseburgers, snacks and ice cream.

LANSCE Radiation Testing

August 2021

Students from the CCL traveled to the Los Alamos Neutron Science Center (LANSCE) to perform a variety of experiments related to computer reliability. Experiments included testing of a Linux-based PCAP scrubber, radiation hardened softcore processors, SoC (System-on-a-Chip) radiation testing methodologies, and FPGA fabric characterization under radiation. The image on the left shows the experiment boards lined up for the neutron radiation beam. The image on the right shows the participating students on the first day of the experiments (and the first day of school).

FPL Conference, Gottenburg, Sweden (remote)

September 2020

Hayden Cook (Master’s student) gave a remote presentation at the 30th International Conference on Field-Programmable Logic and Applications on “Using Novel Configuration Techniques for Accelerated FPGA Aging”.

FPT Conference, Tianjin, China

December 2019

Matthew Ashcraft (PhD student) travelled to Tianjin, China to present his paper at the 2019 International Conference on Field-Programmable Technology on “Synchronizing On-Chip Software and Hardware Traces for HLS-Accelerated Programs,” building on the work presented at the previous years conference.

ChipIr Radiation Testing, Rutherford Appleton Laboratory, Dicot, United Kingdom

November 2019

Students journeyed to ChipIr equipt with several experiments and a desire to discover the unknown. Like LANSCE, ChipIr also provides an accelerated neutron source that is similar to neutron radiation found in the Earth’s atmosphere. A half dozen different boards were included in this test. Experiments covered novel scrubber techniques, structrual redundancy on a RISC-V processor, multi-cell upset detection on the newer FPGA architectures, the use of the Soft Error Mitigation (SEM) Core, and the use of partial circuit replication techniques on academic and commercial FPGA-based networking applications. Experiments were staffed around the clock; students back at BYU remoted into the experiments while those attending prepaired for the next day. A breif visit was made to the nearby historic town of Abingdon for dinner one eveing, and Oxford 1st ward was attended on Sunday, the second to last day.

LANSCE Radiation Testing

October 2019

Students from the CCL traveled to the Los Alamos Neutron Science Center (LANSCE) to evaluate their work on computer reliability in harsh radiation environments. LANSCE provides an accelerated neutron source that mirrors the atmospheric neutron radiation found here on Earth. Several experiments were conducted accross a dozen different boards (left). Some experiments quantified improvements in reliability gained from using structural reduncancy (multiple copies to mask or detect an error) and automated software fault tolerance techniques. Another experiment targeted multi-cell upset detection. A final experiment evaluated novel configuration scrubbing techniques. Busy at the beam, students and adviors alike tended experiments and analyzed data in a remote data room (center). While things were running smoothly, a visit was made to the nearby Bandelier National Monument (right).

PYNQ PRIO Full Integration

October 2019

After continued collaboration between the PRIO team and the Xilinx PYNQ team a new PYNQ release has been announced. A new feature of this release is Device Tree Overlay support, allowing users to insert and remove Kernel drivers at will. The addition of this feature is a result of collaboration between the Xilinx PYNQ team and the BYU CCL PRIO team. This landmark represents the complete integration of PRIO into the PYNQ project. The announcement for this PYNQ release can be found here and the corresponding PRIO release can be found here.

PYNQ Utah Release

February 2019

After almost a year of direct collaboration with BYU CCL students the Xilinx PYNQ team has released a new PYNQ image. One of the featured improvements for this release is new Partial Reconfiguration functionality, a direct result of the collaboration between the PYNQ team and PRIO team. In conjunction with this release the BYU CCL also released a new pip installable python package, complete with a full suite of examples demonstrating this functionality. The release was given the name Utah as a reflection of the contributions made by the PRIO team.